For example, in a general storage system such as a RAID (Redundant Arrays of Inexpensive Disks) system, a plurality of switches are provided between a computer and storages to construct a storage network for communication. The communication is implemented by transmission and reception of frames containing data between a computer and storages through a switch.
FIG. 11 schematically illustrates a hardware configuration example of a storage system 200 in the past. A computer 100 reads data from storages 410 to 460 and writes data to the storages 410 to 460. Enclosures 210-1 to 210-3 are drive enclosures (DE) containing one or more storages. The enclosure 210-1 includes a switch 310-1 and storages 410 and 420, and the enclosure 210-2 includes a switch 310-2 and storages 430 and 440. The enclosure 210-3 includes a switch 310-3 and storages 450 and 460. When acquiring frames, the switches 310-1 to 310-3 route the frames to the destinations of the frames.
Japanese Laid-open Patent Publication No. 2009-140179 is an example of related art.
However, the storage system in the past has a problem of occurrence of performance imbalance due to different arrival times (latencies) of frames from a computer to storages due to the differences in positions of the storages.
The occurrence of the problem will be described more specifically.
With reference to the example illustrated in FIG. 11, the case will be considered in which the computer 100 sends a frame to the storage 410. The frame transmitted from the computer 100 is received by the switch 310-1 via a cable 510. In the switch 310-1, the frame is routed to the storage 410 and reaches the storage 410. In this case, the transmission of the frame from the computer 100 to the storage 410 requires the time for passing the frame through the cable 510 and the time for routing the frame within the switch 310-1.
Next, the case will be considered in which the computer 100 transmits a frame to the storage 430, for example. The frame transmitted from the computer 100 is received by the switch 310-1 via the cable 510. In the switch 310-1, the frame is routed to transmit to the switch 310-2. The routed frame is received by the switch 310-2 via the cable 520. In the switch 310-2, the frame is routed to the storage 430 and reaches the storage 430. In this case, the transmission of the frame from the computer 100 to the storage 430 requires the time for passing through the cable 510 and cable 520 and the time for routing within the switch 310-1 and switch 310-2.
In other words, in accordance with positions of the switches 310-1 to 310-3 to which the storages 410 to 460 belong, the arrival times of the frame from the computer 100 to the storages 410 to 460 differ. Also in the case that a frame is transmitted from the storages 410 to 460 to the computer 100, the arrival times of a frame from the storages 410 to 460 to the computer 100 differ in accordance with the switches 310-1 to 310-3 to which the storages 410 to 460 belong.
This results in different processing times for storage reading processing (Read) or storage writing processing (Write) in which many frames are transmitted and received. Performance imbalance may be caused by different processing times according to the positions of storages even when the same processing is performed on the storages.
The performance imbalance refers to a processing time bias caused by different latencies occurring even when the same processing is performed simultaneously on the storage 410 under the switch 310-1 and the storage 430 under the switch 310-2 in FIG. 11, for example. In other words, it appears that the storage 410 having a shorter transmission distance from the computer 100 has higher performance while the storage 430 has lower performance.
The performance imbalance may cause what is called command sinking in which a command to the storage 430 is not processed within an expected period of time, and its time is up.
The performance imbalance may be avoided by a system manager by setting and controlling for preventing performance reduction or by a program which controls storages on the computer 100 by performing additional processing such as performance management. However, it may take much expense in time and labor, or the program may get complicated. Particularly, when many storages are multi-cascaded and thus cause large variations in latency, manual setting or creation of a program which performs sufficient processing therefor is difficult.